Georgia Institute of Technology
I am interested in understanding and developing OS (and application) support for heterogeneous memory structures (like Phase Change Memory, 3D-Stacked memory) for improving application performance and reliability. I will first discuss the significance of my research, followed by current research accomplishments, and finally the future directions of my research.
Background and Significance:
The disparity between processor and memory speed, also know as `memory gap`  has been the primary focus of recent research in computer system performance. While memory access speed is critical to application performance, with ever-increasing application data in both server and end-user devices, capability to store, access and process such data require larger system memory (RAM) capacity and faster persistent storage capabilities. Scaling memory (DRAM) has been hard due to power and cost constraints. Specifically, for end-user devices, two trends are shaping the computing world (1) the increasing ubiquity and importance of mobile and portable devices, and (2) the relentless increase in core counts and computational capabilities of modern end client platforms. However, a key factor limiting the functionality and performance of client-side computations is the efficient storage of and access to the potentially large data they require. Applications ranging from graphic intensive games, browsers, and multimedia applications can run at the same time increasing the memory and storage needs. While volatile DRAMs required for data processing suffer from the device scalability limitations, other nonvolatile storage like disk and flash have very high access latencies for accessing persistent data.
To address the above mentioned issues, my research focus has been to use new power-efficient, byte addressable persistent nonvolatile memory (NVM) technologies like PCMs , STT-RAM to address DRAM scalability and efficient persistent storage access in end user devices. With this goal, as a first step, I have designed a new system software abstraction `pMem` that provides applications with flexibility to export next generation NVMs 1.) as a memory heap that can solve the need for applications additional memory capacity, and, 2.) persistent storage that solves the slow data storage issues. Our end-to-end system design, which includes the OS and user level library support enables dual use of NVM by treating NVM as a `slow memory rather than as a fast` I/O device`. My research was the first to propose dual use in end-user devices . The results on dual use of NVM showed a substantial decrease in memory (DRAM) usage (~90%) increasing the available memory without impacting the application`s speed. Our design provides applications with fast persistent storage access (2x) compared to current high end storage technologies like Flash/SSD.
This work was published at the `Interactions of NVM/Flash with Operating-Systems and Workloads` workshop  (INFLOW `13) with analysis primarily on web-browsers titled `NVM Heaps for Accelerating Browser-based Applications` in collaboration with my advisers and mentor at Intel Labs. With the goal of further improving the capabilities of system design, we evaluated the overheads of supporting persistent storage in NVMs and the impact of persistence on dual use (storage and capacity). Our novel work studied the impact for end user device (paper titled `Reducing the Cost of Persistence for Nonvolatile Heaps in End User Devices`) and was published at a flagship architecture conference  (HPCA `14). My research on OS design for support of NVM in end client device is under submission at USENIX ATC`14 conference. Analysing power usage for NVM storage and additional memory capacity is important for the following reasons 1.) NVMs do not have refresh power unlike volatile DRAM memory, 2.) NVMs require higher active power compared to DRAM. My ongoing research is focussing on reducing such power constraints.
Other research problems
Nonvolatile memory for reliability: I have also been focussing on opportunities of using next generation NVMs to improve the reliability for high performance computing (HPC) applications. As a part of my summer internship in 2011 and 2012, I started working on methods of optimizing application checkpointing using nonvolatile memory. Though, our work focused on reliability of high performance computing applications, the ideas developed can benefit end client reliability too. Our checkpointing solution, `NVM-checkpoints`, treats NVMs as a virtual memory and replaces the current disk based checkpoints with memory based checkpointing. By treating NVM as virtual memory, we employed several data pre-copy mechanisms, that reduced the checkpoint cost, and substantially reduced the distributed checkpointing overheads on the application by reducing the peak bandwidth utilization. This work was published in the parallel and distributed computing conference   (IPDPS 2014).
Client Storage: My current research work has been motivated by my prior research in combining the capabilities of end user devices in a home environment with datacenter to improve the computational and storage capabilities of end client devices. As a solution, I developed a Xen hypervisor based virtualized storage service, that exploited the Virtualization technology, to provide a seamless and secure sharing of data between end user devices. While most of this work focussed on storage and CPU needs of end user devices, memory bottleneck is an open problem that motivated me towards current research. This work on client storage was published as a paper in the international distributed computing conference   (ICDCS 2011).
Current Research and Future directions: Support for Heterogeneous Memory
Memory architectures are becoming more and more heterogenous with varying density, access speeds and energy consumption. For instance, memory closest to the processor (3D stacked memory) reduce 4x-5x latencies with respect to access latency, but are limited in capacity where as nonvolatile memory technologies like PCM scale in terms of density (~128 GB) but have high access latencies compared to DRAM. In virtualized data centers, with multiple virtual machines (VM) sharing resources, scheduling the VM`s to appropriate memory and CPU resources such that all VM`s achieve SLA guarantees is an important problem to solve. By building upon my prior research to support two levels of memory (DRAM and NVM) to a more generic multiple levels of heterogenous memory, and extending the OS support that is generic to client and server workloads. I would also like to extend my research on HPC application reliability using NVM by providing a distributed checkpointing capability to applications.
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers, ISCA `09
3. Reducing the Cost of Persistence for Nonvolatile Heaps in End User Devices, Sudarsun Kannan, Ada Gavrilovska, Karsten Schwan, 20th IEEE International Symposium On High Performance Computer Architecture (HPCA-2014)
4.NVM Heaps for Accelerating Browser-based Applications, Sudarsun Kannan, Ada Gavrilovska, Karsten Schwan, Sanjay Kumar, Interactions of NVM/Flash with Operating-Systems and Workloads (INFLOW `13)
5. Optimizing Checkpoints Using NVM as Virtual Memory, Sudarsun Kannan,
Ada Gavrilovska, Karsten Schwan, Dejan Milojicic, 27th IEEE International Parallel & Distributed Processing Symposium (IPDPS `13)
6. Using Active NVRAM for I/O
Staging - Sudarsun Kannan, Ada Gavrilovska, Karsten Schwan, Dejan Milojicic, Vanish Talwar, Petascale
Data Analytics: Challenges and Opportunities (SC 2011 workshop)
7. Cloud4Home -- Enhancing Data Services with @Home Clouds, Sudarsun Kannan, Ada Gavrilovska, and Karsten Schwan, 31st Int`l Conference on Distributed Computing Systems (ICDCS 2011)
8. VStore++: Virtual Storage Services for Mobile Devices, Sudarsun Kannan, Karishma Babu, Ada Gavrilovska, and Karsten Schwan, MobiCloud `10