;code to provide sprites with dynamic video memory updating ;patched with xkas header lorom incsrc garble.asm;fix the garbage. THIS IS IMPORTANT ;jump from original code's NMI routine endind ;CODE_0082BC: REP #$30 ;PLB ;PLY ;PLX ;PLA ;PLP ;CODE_0082C3: TI ;fix up old org $82BC REP #$30 PLB PLY ;FastROM registration data org $7FD5 db $30 org $816A JML CodeStart ;new starting location org $138000 ;!!!POINT TO SOME FREE SPACE!!! <---------- THIS IS IMPORTANT!!!!! ;RATS db "STAR" dw CodeEnd-CodeStart dw CodeEnd-CodeStart^#$FFFF CodeStart: SEI PHP REP #$30 PHA PHX PHY PHB SEP #$30 ;8bit AXY LDA #$01 ;FastROM on STA $420D LDA $0100 ;check game mode to see if in game CMP #$07 ;must be in either this mode (title screen)... BEQ GameModeOK CMP #$14 ;... or this mode (level) BNE Return GameModeOK: LDA $79 CMP #$02 BCS t2 JSR tabla1 JMP fin t2: LDA $79 CMP #$04 BCS t3 JSR tabla2 JMP fin t3: LDA $79 CMP #$06 BCS t4 JSR tabla3 JMP fin t4: LDA $79 CMP #$08 BCS t5 JSR tabla4 JMP fin t5: LDA $79 CMP #$0A BCS t6 JSR tabla5 JMP fin t6: LDA $79 CMP #$0C BCS t7 JSR tabla6 JMP fin t7: JSR tabla7 fin: Return: SEP #$30 ;8bit AXY LDA #$80 ;set bank to zero in FastROM area PHA PLB JML $808176 ;jump to code just after pushing, into FastROM area CodeEnd: RTS tabla1: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data1 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data1>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end1-data1 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data1: incbin ExGraphics/ExGFXD00.bin end1: RTS tabla2: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data2 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data2>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end2-data2 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data2: incbin ExGraphics/ExGFXD01.bin end2: RTS tabla3: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data3 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data3>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end3-data3 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data3: incbin ExGraphics/ExGFXD02.bin end3: RTS tabla4: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data4 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data4>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end4-data4 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data4: incbin ExGraphics/ExGFXD03.bin end4: RTS tabla5: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data5 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data5>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end5-data5 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data5: incbin ExGraphics/ExGFXD04.bin end5: RTS tabla6: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data6 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data6>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end6-data6 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data6: incbin ExGraphics/ExGFXD05.bin end6: RTS tabla7: REP #$20 LDA #$7800 ; VRAM address to upload to STA $2116 ; There is a document on SMW's VRAM addresses in the documents section IIRC LDX.b #%00000001 ;(Byte load) Transfer Mode STX $4300 ;(Word Store) Two registers, one byte per register (p, p+1) LDX #$18 ;(Byte load) DMA to VRAM Data Write regs STX $4301 ;(Word Store) Low 2118 High 2119 ; Set reg transfer to $21[18] ($2119 also gets written to since it is a word store of course) LDA #data7 ; Location of data to upload STA $4302 ; low byte and high byte LDX.b #data7>>16 ; Location of data STX $4304 ; bank byte (which bank the data is in) LDA #end7-data7 ; Size of data to transfer STA $4305 ; this is one way to get the size if you don't know it SEP #$20 ; LDA.b #%00000001 ; start DMA STA $420B ; transfer RTS data7: incbin Graphics/GFX02.bin end7: RTS